In cellular communications environment, a plurality of wireless terminals, such as cellular telephones, wireless local loop terminals, some cordless telephones, one-way and two-way pagers, PCS terminals and personal digital assistants, communicate with a corresponding base station. Each of these terminals are configured to handle a wide dynamic frequency and amplitude range. Typically, each wireless terminal includes a radio section that is employed to convert the radio frequency signals (RF) into baseband frequency signals. This conversion, in many instances include multiple intermediate frequency (IF) ranges. The baseband signals are then provided to a signal processing stage for conversion to an audio signal.
The first intermediate frequency (IF) range is typically between 80 MHZ to 200 MHZ. Signal levels amplified by intermediate frequency (IF) amplifiers exhibit a wide dynamic range. Thus, a high input signal level may cause saturation in the signal processing stage. One way to avoid this saturation is to set the gain of the intermediate frequency (IF) amplifier low enough such that a high input signal level would not cause the saturation. However, with a lower gain, the efficiency of the amplifier decreases.
One way to reduce this distortion is to employ a doublet amplifier as illustrated in FIG. 1. Typically a doublet amplifier 32 includes an input transistor 20 that is employed as an amplifier. The base terminal of transistor 20 is configured to receive an input voltage signal via resistor 16 having a value .sub.P and a coupling capacitor 18. The collector terminal of transistor 20 is coupled to a positive power supply signal level, V.sub.CC, via a biasing transistor 28 having a value R.sub.1. The emitter terminal of transistor 20 is coupled to a ground signal level. The output port of transistor 20 is coupled to a base terminal of transistor 22. The emitter terminal of transistor 22 is coupled to a feedback resistor 26, having a value R.sub.2, which in turn is coupled to the ground signal level. The collector terminal of transistor 22 is coupled to V.sub.CC via a biasing resistor 30. Feedback resistor 26 is coupled to the base terminal of transistor 20 via a second feedback resistor 24 having a value R.sub.3.
Amplifier 32 is a shunt-series feedback amplifier with a closed loop gain A.sub.fi approximately equal to -[1+R.sub.3 /R.sub.4 ]. The negative feedback reduces the distortion factors such as the third order intermodulation distortion factor, IM.sub.3, by (1+A.sub.oi .beta.), compared to the amplifier without the feedback and configured to maintain the same output level, where A.sub.oi is the gain of the amplifier without the feedback and .beta. is approximately equal to ##EQU1## which is the fractional current fed back. Since this is a shunt-series feedback, the input signal to the amplifier is a current signal i.sub.i, and the feedback signal is also a current signal. The current gain of the amplifier without feedback (open loop gain, A.sub.oi) is ##EQU2## where g.sub.m1 and g.sub.m2 are the transconductances of transistor 20 and transistor 22, respectively, and r.sub..pi.1 and r.sub..pi.2 are the small signal input shunt resistances of bipolar transistors 20 and 22. The closed loop current gain A.sub.fi is ##EQU3## Then, the closed loop voltage gain, A.sub.fv ##EQU4##
Since a large signal causes more distortion, the loop gain, A.sub.oi .beta., must be increased when a large input signal is applied. Thus, the improvement in the third order intermodulation distortion, IM.sub.3, is affected, among other things, by the open-loop gain.sub.oi A. However.sub.oi, A is determined by transconductances, g.sub.m1 and g.sub.m2 as well as R.sub.1, R.sub.2, and R.sub.3. The values of g.sub.m s and Rs are constrained by what is known as the headroom of the circuit, which in turn is constrained by the supply voltage, V.sub.CC. The headroom is typically defined as the maximum possible input voltage range, before a transistor configured to receive the input voltage signal fails to provide satisfactory amplification. As the supply voltage goes down to below 3 volts and further down to 2 volts, the available headroom value decreases for any given input signal. As a result conventional amplifier designs such as the one illustrated in FIG. 1 begin to operate in an unsatisfactory manner.
The headroom constraint can be illustrated by an example with reference to FIG. 1 for a situation where the supply voltage, V.sub.CC, is approximately 2 volts. As illustrated, the potential at the base terminal of transistor 20 must be at least 0.8 volts (V.sub.be) above the ground level to turn transistor 20 on. The potential at the base terminal of transistor 20 and the emitter terminal of transistor 22 is approximately equal. Thus, the potential at the collector terminal of transistor 20 must be at least twice, V.sub.be, or approximately 1.6-1.75 volts. This leads to a substantially low voltage drop--approximately 0.4 volts--across resistor 30 (R.sub.1). As a result the current flowing through the collector of transistor 20, Ic.sub.20, is also relatively small.
The open loop gain of transistor 20 is affected by the transconductance, gm.sub.1, which in turn depends on the value of collector current Ic.sub.20, and further on R.sub.1. A small value of collector current and resistance, R.sub.1 leads to a small loop gain, and hence very little reduction in distortion.
For wireless terminal applications there is a continuous strive to decrease the power supply voltage source level. For example, currently many wireless terminals are configured to operate with power supply levels in the order of 2-3 volts. Although variable gain amplifiers have been previously used in various applications, there is a need for a variable gain amplifier that can operate with substantially low power supply signal source, V.sub.CC, in the order of 2-3 volts, and can still exhibit desirable phase and frequency characteristics.